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TT09 VGA CA

by Alexander Mordvintsev

This is a gate-level simulation of my TinyTapeout '09 submission running directly in your browser. The circuit occupies a single 160x100 μm tile on a multiproject chip and generates a 60fps 640x480 VGA signal that forms a scrolling animation of several elementary 1D cellular automata rules. Most of the tile area is occupied by two 160-bit shift registers: one (left) stores the current image line, while another (right) stores the first line of the next frame (4th line of the current).

This demo combines a tiny custom WebAssembly gate-level simulator with a SwissGL-based interactive visualization of gate activations. The overlay displays the content of the simulated VGA screen and the current ray position.

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